Semiconductor Electronics: Materials, Devices and Simple Circuits

NCERT Exemplar Solutions Class 12 Physics Semiconductor Electronics — Long Answer Questions Q31–40

NCERT Exemplar Problems, Class 12 Physics — Semiconductor Electronics: Materials, Devices and Simple Circuits, Long Answer Questions 31 to 40. All 10 questions solved. The book numbers them 14.31 to 14.40; here they are Questions 31 to 40.

Three ideas carry this page. A diode is a one-way switch: forward biased it is a small resistance (or a fixed 0.7 V drop), reverse biased it is an open circuit, so any diode network is solved by first deciding which diodes conduct. A transistor biased in the active region obeys $I_C=\beta I_B$ and $I_E=I_B+I_C$, which turns every biasing question into a pair of loop equations. Logic gates compose: NAND and NOR are universal, and any truth table can be built from AND, OR and NOT.

Key insight. Decide the state of each device first (diode on or off, transistor active, saturated or cut off), then write ordinary Kirchhoff loop equations. In Questions 39 and 40 the base divider must be replaced by its Thevenin equivalent before $I_B$ is found.

Question 31

If each diode in Fig. 14.13 has a forward bias resistance of $25\ \Omega$ and infinite resistance in reverse bias, what will be the values of the currents $I_1$, $I_2$, $I_3$ and $I_4$?

Solution. The figure shows a $5$ V cell (with a $25\ \Omega$ resistor in series) driving three parallel branches, each a diode in series with $125\ \Omega$. The branches are AB (current $I_4$), CD (current $I_3$) and EF (current $I_2$), and $I_1$ is the total current from the cell. The diodes in AB and EF point so that current flows forward through them, while the diode in CD is turned the other way round and is reverse biased. A reverse-biased diode has infinite resistance, so $$I_3 = 0.$$

Each conducting branch has resistance $25 + 125 = 150\ \Omega$. Two such branches in parallel give $75\ \Omega$, and the $25\ \Omega$ resistor is in series with them, so the total resistance is $100\ \Omega$. Then $$I_1 = \frac{5}{100} = 0.05\ \text{A}.$$ The two conducting branches are identical, so they share this current equally: $$I_2 = I_4 = 0.025\ \text{A}.$$

$I_1 = 0.05$ A, $I_2 = I_4 = 0.025$ A, $I_3 = 0$.

Question 32

In the circuit shown in Fig. 14.14, when the input voltage of the base resistance is $10$ V, $V_{be}$ is zero and $V_{ce}$ is also zero. Find the values of $I_b$, $I_c$ and $\beta$.

Solution. The figure shows an npn transistor with $R_B = 400\ \text{k}\Omega$ in the base and $R_C = 3\ \text{k}\Omega$ in the collector, connected to a $10$ V supply. Since $V_{be}=0$, the whole $10$ V input appears across $R_B$: $$I_b = \frac{10}{400\times10^{3}} = 25\ \mu\text{A}.$$ Since $V_{ce}=0$, the whole $10$ V supply appears across $R_C$: $$I_c = \frac{10}{3\times10^{3}} = 3.33\ \text{mA}.$$ Therefore $$\beta = \frac{I_c}{I_b} = \frac{3.33\times10^{-3}}{25\times10^{-6}} \approx 133.$$

$I_b = 25\ \mu$A, $I_c = 3.33$ mA, $\beta \approx 133$.

Question 33

Draw the output signals $C_1$ and $C_2$ in the given combination of gates (Fig. 14.15).

Solution. The figure shows the input waveforms $A$ and $B$ and two gate networks. In the first, $A$ and $B$ each go to a NAND gate with both inputs tied together, then the two outputs go to a third NAND gate, and its output goes to a fourth NAND gate with inputs tied, giving $C_1$. In the second, $A$ and $B$ each go to a NOR gate with inputs tied, and the two outputs go to a third NOR gate, giving $C_2$.

Network 1. A NAND gate with its inputs joined is a NOT gate, so the first two gates give $\bar A$ and $\bar B$. The third gate gives $\overline{\bar A\cdot\bar B} = A+B$. The last gate inverts this: $$C_1 = \overline{A+B},$$ which is a NOR gate.

Network 2. A NOR gate with its inputs joined is also a NOT gate, giving $\bar A$ and $\bar B$. The third gate gives $\overline{\bar A+\bar B} = A\cdot B$, so $$C_2 = A\cdot B,$$ which is an AND gate.

Reading the input graph in one-second intervals ($A$ is high for 0 to 2 s and 3 to 4 s; $B$ is high for 1 to 3 s):

Interval (s) $A$ $B$ $C_1=\overline{A+B}$ $C_2=AB$
0 to 1 1 0 0 0
1 to 2 1 1 0 1
2 to 3 0 1 0 0
3 to 4 1 0 0 0
4 to 5 0 0 1 0

So $C_1$ is low throughout except for a single high pulse from $4$ to $5$ s, and $C_2$ is low throughout except for a single high pulse from $1$ to $2$ s.

$C_1=\overline{A+B}$ (NOR) is high only for $4$ to $5$ s; $C_2=AB$ (AND) is high only for $1$ to $2$ s; both are low at all other times.

Question 34

Consider the circuit arrangement shown in Fig. 14.16 (a) for studying input and output characteristics of an npn transistor in CE configuration. Select the values of $R_B$ and $R_C$ for a transistor whose $V_{BE} = 0.7$ V, so that the transistor is operating at point Q as shown in the characteristics shown in Fig. 14.16 (b). Given that the input impedance of the transistor is very small and $V_{CC} = V_{BB} = 16$ V, also find the voltage gain and power gain of the circuit making appropriate assumptions.

Solution. The characteristic is the $I_C$ against $V_{CE}$ curve for $I_B = 30\ \mu$A, and the point Q on it is at $V_{CE} = 8$ V and $I_C = 4$ mA. So at Q: $V_{CE}=8$ V, $I_C=4$ mA, $I_B=30\ \mu$A.

Collector resistor. The collector loop gives $V_{CC} = I_CR_C + V_{CE}$, so $$R_C = \frac{16-8}{4\times10^{-3}} = 2\ \text{k}\Omega.$$

Base resistor. The base loop gives $V_{BB} = I_BR_B + V_{BE}$, so $$R_B = \frac{16-0.7}{30\times10^{-6}} = 510\ \text{k}\Omega.$$

Current gain. $$\beta = \frac{I_C}{I_B} = \frac{4\ \text{mA}}{30\ \mu\text{A}} \approx 133.$$

Voltage and power gain. The input impedance of the transistor is very small, so the resistance seen by the input signal is essentially $R_B$, while the output resistance is $R_C$. The a.c. voltage gain is then $$A_V = \beta\,\frac{R_C}{R_B} = 133\times\frac{2}{510} \approx 0.52,$$ where the minus sign of a CE amplifier (phase reversal) is left out as it only marks the $180^\circ$ phase shift. The power gain is $$A_P = \beta A_V = \beta^2\frac{R_C}{R_B} = 133^2\times\frac{2}{510} \approx 70.$$

$R_C = 2\ \text{k}\Omega$, $R_B = 510\ \text{k}\Omega$, $\beta \approx 133$, voltage gain $\approx 0.52$, power gain $\approx 70$.

Printed key error. Minor: the key gives the power gain as $69$. With $\beta = 133.3$ the product is $69.7$, so $69$ is only the rounding of the intermediate values.

Question 35

Assuming the ideal diode, draw the output waveform for the circuit given in Fig. 14.17. Explain the waveform.

Solution. The figure shows an a.c. source $20\sin\omega t$ in series with a resistor, and across the output terminals a diode in series with a $5$ V cell. The diode’s anode is on the upper output line and its cathode is joined to the positive plate of the cell, so the diode conducts only when the input voltage exceeds $5$ V.

  • When $v_i > 5$ V the diode is forward biased. It acts as a short circuit, so the output is held at the cell voltage, $+5$ V. The rest of the input drops across the series resistor.
  • When $v_i < 5$ V (including all the negative half cycle) the diode is reverse biased and carries no current. There is no drop across the series resistor, so the output equals the input.

The output is therefore the sine wave $20\sin\omega t$ with its positive peaks sliced off flat at $+5$ V, while the negative half cycles are unchanged and reach the full $-20$ V. This is a clipping (limiter) circuit.

The output follows $20\sin\omega t$ but is clipped flat at $+5$ V on the positive peaks; the negative half cycles are full, down to $-20$ V.

Question 36

Suppose a ‘n’-type wafer is created by doping Si crystal having $5\times10^{28}$ atoms/m$^3$ with 1 ppm concentration of As. On the surface 200 ppm Boron is added to create a ‘P’ region in this wafer. Considering $n_i = 1.5\times10^{16}\ \text{m}^{-3}$, (i) calculate the densities of the charge carriers in the $n$ and $p$ regions. (ii) Comment which charge carriers would contribute largely for the reverse saturation current when the diode is reverse biased.

Solution. (i) n region. One part per million of arsenic means $$n_e \approx N_D = 10^{-6}\times5\times10^{28} = 5\times10^{22}\ \text{m}^{-3}.$$ The mass-action law $n_en_h = n_i^2$ gives the holes: $$n_h = \frac{n_i^2}{n_e} = \frac{(1.5\times10^{16})^2}{5\times10^{22}} = \frac{2.25\times10^{32}}{5\times10^{22}} = 4.5\times10^{9}\ \text{m}^{-3}.$$

p region. The boron concentration is $$N_A = 200\times10^{-6}\times5\times10^{28} = 10^{25}\ \text{m}^{-3},$$ which is far larger than the arsenic already present ($5\times10^{22}$), so the net acceptor density is essentially $N_A$ and $$n_h \approx 10^{25}\ \text{m}^{-3},\qquad n_e = \frac{n_i^2}{n_h} = \frac{2.25\times10^{32}}{10^{25}} = 2.25\times10^{7}\ \text{m}^{-3}.$$

(ii) The reverse saturation current is carried by minority carriers, which are swept across the junction by the barrier field. The minority carriers in the $n$ region are holes, $4.5\times10^{9}\ \text{m}^{-3}$, and in the $p$ region they are electrons, $2.25\times10^{7}\ \text{m}^{-3}$. Holes from the $n$ side are about $200$ times more numerous, so holes contribute most of the reverse saturation current.

$n$ region: $n_e = 5\times10^{22}$ m$^{-3}$, $n_h = 4.5\times10^{9}$ m$^{-3}$. $p$ region: $n_h \approx 10^{25}$ m$^{-3}$, $n_e = 2.25\times10^{7}$ m$^{-3}$. The reverse saturation current is mainly due to holes.

Printed key error. Minor: the key writes the hole density in the $n$ region as “$0.45\times10$/m$^3$”. This is a typesetting slip for $0.45\times10^{10} = 4.5\times10^{9}$ m$^{-3}$, which agrees with the working above.

Question 37

An X-OR gate has the following truth table:

A B Y
0 0 0
0 1 1
1 0 1
1 1 0

It is represented by the following logic relation $$Y = \bar A\cdot B + A\cdot\bar B.$$ Build this gate using AND, OR and NOT gates.

Solution. The expression has two product terms and a sum, so the circuit has three layers.

  1. Pass $A$ and $B$ each through a NOT gate to get $\bar A$ and $\bar B$.
  2. Feed $\bar A$ and $B$ into one AND gate, giving $\bar A B$; feed $A$ and $\bar B$ into a second AND gate, giving $A\bar B$.
  3. Feed the two AND outputs into an OR gate, giving $Y = \bar AB + A\bar B$.

Check: for $A=B=0$ both products are $0$, so $Y=0$; for $A=0,B=1$ the first product is $1$, so $Y=1$; for $A=1,B=0$ the second product is $1$, so $Y=1$; for $A=B=1$ both products contain a $0$, so $Y=0$. This reproduces the table.

Two NOT gates give $\bar A$, $\bar B$; two AND gates give $\bar AB$ and $A\bar B$; an OR gate combines them: $Y=\bar AB+A\bar B$.

Printed key error. Minor: the key’s drawing outlines the final gate like an AND gate but labels its output with the sum $\bar AB + A\bar B$. A gate that forms a sum is an OR gate, which is what the construction above uses.

Question 38

Consider a box with three terminals on top of it as shown in Fig. 14.18 (a). Three components, namely two germanium diodes and one resistor, are connected across these three terminals in some arrangement. A student performs an experiment in which any two of these three terminals are connected in the circuit shown in Fig. 14.18 (b). The student obtains graphs of current-voltage characteristics for the unknown combination of components between the two terminals connected in the circuit. The graphs are (i) when A is positive and B is negative, (ii) when A is negative and B is positive, (iii) when B is negative and C is positive, (iv) when B is positive and C is negative, (v) when A is positive and C is negative, (vi) when A is negative and C is positive (Fig. 14.18 (c) to (h)). From these graphs of current-voltage characteristic shown in Fig. 14.18 (c) to (h), determine the arrangement of components between A, B and C.

Solution. Read the six graphs in pairs, one pair for each pair of terminals.

Terminals A and B (graphs (i) and (ii)). With A positive and B negative there is only a tiny leakage current. With A negative and B positive there is no current until about $0.7$ V, and after that the line is straight with $1/\text{slope} = 1000\ \Omega$. A knee at $0.7$ V is a germanium-type diode turning on, and the straight line afterwards shows a resistor in series. So between A and B there is a diode in series with a $1\ \text{k}\Omega$ resistor, with the diode’s anode towards B (it conducts when B is the positive terminal).

Terminals B and C (graphs (iii) and (iv)). With C positive and B negative the current is zero until $0.7$ V and then rises almost vertically, the sharp knee of a diode alone. With B positive and C negative there is only leakage. So between B and C there is a single diode, with its anode towards C.

Terminals A and C (graphs (v) and (vi)). With A positive and C negative there is only leakage. With A negative and C positive the current starts only after $1.4$ V, which is twice $0.7$ V, so both diodes are in series. Conduction needs C positive and A negative, which is the path C to B to A through the diode between C and B, then the diode and resistor between B and A. This agrees with the A–B and B–C findings.

The arrangement is therefore $$C\ \xrightarrow{\ \text{diode}\ }\ B\ \xrightarrow{\ \text{diode, then }1\ \text{k}\Omega\ }\ A,$$ that is, a diode joins C to B (anode at C), and a second diode in series with the $1\ \text{k}\Omega$ resistor joins B to A (anode at B), so conventional current can flow only from C through B to A.

C — diode (anode at C) — B — diode (anode at B) in series with $1\ \text{k}\Omega$ — A. Current can pass only in the direction C to B to A.

Question 39

For the transistor circuit shown in Fig. 14.19, evaluate $V_E$, $R_B$, $R_E$ given $I_C = 1$ mA, $V_{CE} = 3$ V, $V_{BE} = 0.5$ V and $V_{CC} = 12$ V, $\beta = 100$.

Solution. The figure shows a voltage-divider biased transistor: $R_B$ from $V_{CC}$ to the base, $20\ \text{k}\Omega$ from the base to earth, $R_C = 7.8\ \text{k}\Omega$ in the collector and $R_E$ in the emitter.

Currents. $I_C = 1$ mA and $\beta=100$, so $$I_B = \frac{I_C}{\beta} = 10\ \mu\text{A}.$$ Since $I_B$ is small, $I_E \approx I_C = 1$ mA.

Emitter resistor. Round the collector–emitter loop, $$V_{CC} = I_C R_C + V_{CE} + I_E R_E,$$ $$12 = 1\ \text{mA}\,(7.8\ \text{k}\Omega + R_E) + 3.$$ So $7.8 + R_E = 9$ in kilo-ohms, and $$R_E = 1.2\ \text{k}\Omega,\qquad V_E = I_ER_E = 1.2\ \text{V}.$$

Base voltage. $V_B = V_E + V_{BE} = 1.2 + 0.5 = 1.7$ V.

Base resistor. The current in the $20\ \text{k}\Omega$ resistor is $$I_1 = \frac{1.7}{20\ \text{k}\Omega} = 0.085\ \text{mA}.$$ The current through $R_B$ supplies this and the base current: $$I_{R_B} = 0.085 + 0.010 = 0.095\ \text{mA}.$$ The drop across $R_B$ is $12 – 1.7 = 10.3$ V, so $$R_B = \frac{10.3\ \text{V}}{0.095\ \text{mA}} \approx 108\ \text{k}\Omega.$$

$V_E = 1.2$ V, $R_E = 1.2\ \text{k}\Omega$, $R_B \approx 108\ \text{k}\Omega$.

Printed key error. Minor: the key writes the denominator of the $R_B$ expression as “$1.085$”; it should be $0.095$ mA ($0.085 + 0.010$). The key’s result of $108\ \text{k}\Omega$ is right, so this is a misprint.

Question 40

In the circuit shown in Fig. 14.20, find the value of $R_C$. ($\beta = 100$, $V_{BE} = 0.5$ V, $V_{CE} = 3$ V.)

Solution. The figure shows the supply of $12$ V, a $100\ \text{k}\Omega$ resistor from the supply to the base, a $20\ \text{k}\Omega$ resistor from the base to earth, the unknown $R_C$ in the collector and an emitter resistor to earth. The value of the emitter resistor is not given in the question. The printed solution’s working implies $R_E = 1\ \text{k}\Omega$, so we take that value.

Thevenin equivalent of the base network. The $100\ \text{k}\Omega$ and $20\ \text{k}\Omega$ resistors form a divider across $12$ V: $$V_{th} = 12\times\frac{20}{100+20} = 2\ \text{V},\qquad R_{th} = \frac{100\times20}{100+20} = 16.7\ \text{k}\Omega.$$

Base current. The base loop gives $V_{th} = I_BR_{th} + V_{BE} + I_ER_E$ with $I_E = (\beta+1)I_B = 101I_B$: $$I_B = \frac{2-0.5}{16.7\ \text{k}\Omega + 101\times1\ \text{k}\Omega} = \frac{1.5}{117.7\ \text{k}\Omega} = 12.7\ \mu\text{A}.$$ Hence $I_C = \beta I_B = 1.27$ mA and $I_E = 1.29$ mA.

Collector resistor. The collector–emitter loop gives $12 = I_CR_C + V_{CE} + I_ER_E$: $$R_C = \frac{12 – 3 – 1.29}{1.27}\ \text{k}\Omega \approx 6.05\ \text{k}\Omega \approx 6.1\ \text{k}\Omega.$$

$R_C \approx 6.05\ \text{k}\Omega$ (about $6.1\ \text{k}\Omega$), taking $R_E = 1\ \text{k}\Omega$, which the question does not state.

Printed key error. The key ignores the $20\ \text{k}\Omega$ resistor altogether. It takes the base feed as $100\ \text{k}\Omega$ straight from $12$ V, so $I_B = 11.5/200\ \text{mA}$ (the $11.5$ V being $12 – 0.5$), $I_C = 5.75$ mA and $R_C = 0.56\ \text{k}\Omega$. But the $20\ \text{k}\Omega$ resistor is part of the divider that sets the base voltage, and with it in place the answer is about $6.05\ \text{k}\Omega$. The question itself is also defective in not stating $R_E$.

Common mistakes

  • Treating all three diodes as conducting in Question 31. The diode in the CD branch is reversed, so $I_3 = 0$ and the parallel resistance is $75\ \Omega$, not $50\ \Omega$.
  • Putting a base-emitter drop into Question 32. The question says $V_{be}=0$ and $V_{ce}=0$, so the whole $10$ V is across each resistor.
  • Reading $C_1$ as an OR gate in Question 33. The last NAND inverts $A+B$, so $C_1$ is the NOR.
  • Using $V_{BB}$ alone for $R_B$ in Question 34. The $0.7$ V of $V_{BE}$ must be subtracted: $R_B = 15.3/30\ \mu\text{A}$.
  • Clipping the wrong half in Question 35. The diode conducts when $v_i>5$ V, so the positive peaks are cut at $+5$ V and the negative half cycle survives in full.
  • Using the full $5\times10^{28}$ for $n_h$ in the $p$ region of Question 36. Boron is $200$ ppm, so $N_A = 10^{25}$ m$^{-3}$, and $n_e$ then follows from $n_en_h=n_i^2$.
  • Dropping the base current in the divider of Question 39. The $R_B$ current is $0.085 + 0.010$ mA, not just $0.085$ mA.
  • Treating the $100\ \text{k}\Omega$ as the whole base feed in Question 40. The divider has to be reduced to its Thevenin form, $2$ V behind $16.7\ \text{k}\Omega$.

Practise next

  • A transistor in CE mode has $\beta = 100$, $V_{CC} = 10$ V and $R_C = 2\ \text{k}\Omega$, and is in the active region with $I_B = 20\ \mu$A. Find $I_C$ and $V_{CE}$.
Show answer

$I_C = 2$ mA and $V_{CE} = 6$ V. $I_C = \beta I_B = 100\times20\ \mu\text{A} = 2$ mA, and the collector loop gives $V_{CE} = 10 – 2\ \text{mA}\times2\ \text{k}\Omega = 6$ V.

  • Silicon with $n_i = 1.5\times10^{16}\ \text{m}^{-3}$ is doped with acceptors to $10^{22}\ \text{m}^{-3}$. Find the electron density.
Show answer

$2.25\times10^{10}\ \text{m}^{-3}$. The holes are $\approx 10^{22}$, so $n_e = n_i^2/n_h = 2.25\times10^{32}/10^{22} = 2.25\times10^{10}\ \text{m}^{-3}$.

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